[stdout]
Chunk Args: RustBridgeChunkInputs { range: Range { start: Some(Barcode { gem_group: 1, valid: true, sequence: CTCGTCAGTGTGAATA }), end: Some(Barcode { gem_group: 1, valid: true, sequence: CTGCCTAGTTAAGTAG }) }, valid_shards: [ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/MAKE_SHARD/fork0/chnk0-ucc6a7a71c0/files/valid.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk00-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk01-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk02-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk03-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk04-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk05-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk06-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk07-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk08-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk09-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk10-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk11-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk12-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk13-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk14-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk15-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk16-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk17-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk18-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk19-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk20-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk21-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk22-ucc6a7a72b9/files/valid_shard.shard"), ReadShardFile("/scratch/etanis/ST-118/multi/dimitri-multi/SC_MULTI_CS/SC_MULTI_CORE/MULTI_GEM_WELL_PROCESSOR/VDJ_T_GEM_WELL_PROCESSOR/SC_VDJ_CONTIG_ASSEMBLER/BARCODE_CORRECTION/fork0/chnk23-ucc6a7a72b9/files/valid_shard.shard")] }
